1. Field of the Invention
This invention relates to a digital computer system having an identification device. More particularly, it relates to an identification device that is a programmable array of logic (PAL) that is programmed to provide an identification code in a series of READ references to the same address.
2. Description of the Prior Art
In the prior art, the main logic board of a central processor unit (CPU) has had an array of fuses imprinted on the surface thereof. The fuses have then been selectively opened to form a unique ID number. The fuse pattern is then read under control of the CPU to provide the unique ID number. If the board requires replacement, the unique ID number must again be set using the fuse technique, which may be difficult or impossible in the field. Also, the fuses take room on the board and require a relatively complex manufacturing technique.
Another prior art system is one wherein a unique ID number is placed in the system Read Only Memory (ROM). The ROM is read under control of the CPU and the unique ID number is recognized. The ROM, however, often needs updates and is generally easily and readily removed from the main circuit board. ROM copying machines are readily available and, therefore the ROM and its unique ID number may be copied and installed in an unauthorized system. Furthermore, when a field ROM update is required, it is difficult to produce a new ROM with the same unique ID number.
Still another prior art system involves storing a unique ID number in a separate Programmable Read Only Memory (PROM). The PROM is soldered into the main circuit board, making its removal difficult. However, once removed, copying is easily accomplished. Typically, a small PROM has an 8-bit word. In a typical application, a 24-bit word is required and, therefore, three (3) input/output (I/O) locations are needed. Since I/O space is very limited, the use of more than one location is a serious drawback.
This invention overcomes the weaknesses of the prior art as set out above.